Egyptian Startup Accelerates High Performance Accounting

Hardware is the key to performance, as so then as power efficiency. Even though DFP software libraries exist, they are relatively slow when it comes to compute-intensive DFP applications like large-scale telephone billing. SilMinds has tested its FPGA-based card solution using IBM's Telco Billing benchmark and reported a 6X speedup compared to a software implementation on a 3 GHz x86 platform. "For other applications we expect that overall speedups will range from 4 to 5x up to 15x" said Assem El Gamal, SilMinds Design Manager. According to him, the variance depends on how much of the application is spent doing decimal floating point computations. In the case of the Telco benchmark, a fair amount of application run time is spent on disk I/O.

Multiple FPGAs per card and multiple card architectures are pursuant to this agreement study to support multiprocessing and virtualization, with many simultaneous application instances being afforded the maximum speedup needed by each to achieve maximum server resource savings. SilMinds speculates that datacenter TCO and energy saving could be reduced by 80-90 percent. As well under investigation is a network-centric acceleration architecture that could support SaaS and cloud computing.

DFP ASIC is in the works as then

A DFP ASIC is in the works as then, which according to SilMinds, has already been validated. The idea here is to get the ultimate in performance, sans the reconfigurability of the FPGA. As well on the horizon is a compiler that will generate the appropriate low-level parallel computations without the need for extensive API calls.

With other HPC innovation focused on binary floating point capabilities to support scientific applications, the needs of performance-demanding DFP users have largely gone unserved. Financial regulatory requirements, a new floating point standard, and an expanding application space could propel SilMinds and their market into the limelight.

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