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Number of unprecedented things

This year happened a number of unprecedented things: Nvidia disclosed its short-term and long-term roadmaps and during no details were revealed, the direction of the company became furthermore obvious, OCZ Innovation decided to drop the business of inexpensive memory modules to concentrate on solid-state drives, Panasonic grabbed exclusive rights onto Blu-ray 3D version of Avatar movie and ex-Sony executives expressed doubts that the PlayStation 3 could win the war against Xbox 360 and Wii. Nevertheless, those events and claims are hardly too important.

There are news-stories that you, our readers, read more than others. We picked those stories up, analyzed them and chose those, which as a matter of fact introduced something really important for the computing industry. Intrinsically, we combined several news-stories into a single news-topic. We did not this time tried to evaluate the importance of any events, for us, they are evenly substantial.

Graphics processor is

Designing a graphics processor is by all means not an easy task, this is a lesson that Intel Corp.'s engineers learnt in 2009 - 2010 period. Firstly, Intel "delayed" roll-out of its code-named Larrabee graphics chip, secondly, the company just scrapped the project and said officially that it was unlikely to release it as a discrete graphics product. Nevertheless while the GPU from Intel is in substance dead, the company outlined plans to multi-core commercial accelerators for high-performance computing systems and started to ship its single-chip cloud computer processor with 48-cores to researchers.

"We will not bring a discrete graphics product to market, for the moment in the short-term. […] We are as well executing on a business possibility derived from the Larrabee program and Intel innovation in many-core chips. This server product line expansion is optimized for a broader range of highly parallel workloads in segments just as high performance computing. We will as well continue with ongoing Intel architecture-based graphics and HPC-related R&D and proof of concepts," said Bill Kircos, director of product and research media relations at Intel.

HPC is a segment that will benefit tangibly from many-core architectures. This year IBM and other makers of HPC servers unveiled machines featuring Nvidia Corp.’s Tesla 2000-series many-core computing processors that are designed exactly to rival x86 offerings from Advanced Micro Devices, Intel or non-x86 processors on the high-performance computing market. AMD as well admits that in the end accelerators like AMD FireStream or Nvidia Tesla will rival traditional chips substantially.

Perhaps, MIC is exciting, now will it bring profits? In order to develop those architectures, it is necessary to sell them on a broad set of markets; during the HPC market after all relies onto CPUs, which is why the graphics processor vendors cannot get high revenue here. It seems that luxuries can come in and go, a long-term-oriented strategy stays.

The economic model [with MIC]

"I do not see the economic model [with MIC]. We are able to produce those [Tesla] GPGPUs because the ultimately there is one GPU for GeForce consumer graphics, Quadro professional business. It costs $500 million to $1 billion to develop those new products every year, it is a hyge investment. Unless you have that [consumer and professional] economic engine in the background, I cannot imagine how one could make a GPU without having a graphics business," said said Sumit Gupta, product manager at Nvidia's Tesla business unit, in an interview with X-bit labs.

The SCC prototype chip contains 24 tiles with two x86 cores per each, which results in 48 cores – the largest number ever placed on a single piece of silicon. Each core can run a separate OS and software stack and act like an individual compute node that communicates with other compute nodes over a packet-based network. Every core sports its own L2 cache and each tile sports a special router logic that allows tiles to communicate with each other using a 24-router mesh network with 256GB/s bisection bandwidth. There is no hardware cache coherence support among cores in order to simplify the design, reduce power consumption and to encourage the exploration of datacenter distributed memory software models on-chip. Each tile can have its own frequency, and groupings of four tiles can each run at their own voltage. The processor sports four integrated DDR3 memory controllers, or one controller per twelve cores.

Intel calls x86 cores inside the SCC as "Pentium-class" cores since they are superscalar in-order execution engines, however stresses that those are not cores used inside by the original Pentium processors since they have been enhanced in order to achieve certain goals and make the design suitable for implementation into the experimental chip. Considering that SCC lacks any floating point vector units, raw horsepower of the chip is relatively weak.

More information: Xbitlabs