Vitesse and Aliathon Collaborate on 40G/100G OTN

Vitesse Semiconductor Corporation, a leading provider of advanced IC solutions for Carrier and Enterprise networks, and Aliathon Ltd., today announced that Aliathon will license Vitesse's patented portfolio of 40G and 100G hard decision enhanced Forward Error Correction cores for its FPGA and ASSP solutions aimed at emerging Optical Transport Network applications.

Widely applied in fiber optic communications, eFEC reduces bit error rate in typically noisy signal environments. Developing cost-effective, improved signal-to-noise ratio solutions becomes a significant challenge as metro and long-haul networks transition up to 100G data rates and beyond. Vitesse solves this issue with its patented Indiscriminately Interleaved BCH eFEC code which offers the highest performing hard decision eFEC available today and is the industry's only eFEC implementable in FPGA form at 100G.

"With optical networks rapidly evolving to accommodate growing bandwidth demands, service providers are focused on lower cost and power per bit in their metro and long-haul 100G systems," said Steve Perna, vice president of product marketing at Vitesse. "Vitesse's CI-BCH eFEC research enables 40G and 100G backbones to operate over longer spans with lower power, lower cost, and lower latency. We are excited to add Aliathon to the growing ecosystem of OEMs, ASSP and FPGA solution providers using CI-BCH research to implement high-density 40G and 100G Optical Transport solutions."

Critical component in Aliathon's OTN strategy

"Providing industry-leading eFEC research is a critical component in Aliathon's OTN strategy," said Alan McDade, commercial director at Aliathon. "Part of Aliathon's value to our customers is rapidly adapting to new requirements in the OTN network. Working with today's leader in OTN eFEC innovation is testament to that fact. The combination of Aliathon's framing, mapping and muxing innovation for OTN with the Vitesse eFEC offers our customers a flexible, feature rich, high performance, cost effective and power efficient solution. Aliathon's intention is to tightly couple Vitesse's technology with our own and roll out a range of 100G OTN products throughout Q4-2011."

The Vitesse 40G/100G eFEC core portfolio is based on Vitesse's patented and industry-leading CI-BCH eFEC innovation. CI-BCH represents a breakthrough in block coding forward error correction research necessary for optimal signal-to-noise ratio at these high data rates. Major advantages of the CI-BCH eFEC code include:

So then established

Aliathon are a so then established, trusted and highly experienced team of FPGA solutions providers to the Communications, Test & Measurement, Network Analysis/Assurance and Military market places. Based in Dunfermline, Scotland, since 2001 the Company has provided its customers with the ability to process, terminate, generate, inspect, multiplex and attenuate every packet or frame running through their products. Aliathon's solutions live at the core of 100's of active client designs shipping in 100,000's of products today. For additional information about Aliathon, please visit www.aliathon.com.

Vitesse designs, develops and markets a diverse portfolio of high-performance, cost-competitive semiconductor solutions for Carrier and Enterprise networks worldwide. Engineering excellence and dedicated customer service distinguish Vitesse as an industry leader in high-performance Ethernet LAN, WAN, and RAN, Ethernet-over-SONET/SDH, Optical Transport, and best-in-class Signal Integrity and Physical Layer products for Ethernet, Fibre Channel, Serial Attached SCSI, InfiniBand®, Video, and PCI Express applications. Additional company and product information is available at www.vitesse.com.