Quad 24- and 32-bit Architecture Enables Better Performance

Tensilica,® Inc. today announced the HiFi 3 audio/voice DSP IP core for SOC design. This fourth-generation audio DSP offers higher performance with lower power for high-performance audio post-processing and voice processing algorithms used in smartphone and home entertainment systems and expands Tensilica's market-leading HiFi architecture to quad 24/32-bits. Tensilica has already licensed HiFi 3 to a tier one smartphone OEM and a tier one semiconductor manufacturer.

"The HiFi 3 DSP is the natural evolution of our popular HiFi 2 architecture, which is the most popular licensable audio DSP core and has been designed into millions of smartphones, Blu-ray Disc players, digital televisions, cameras, and other devices," stated Larry Przywara, senior director of multimedia marketing. "HiFi 3 was initiated based on smartphone OEM and semiconductor manufacturer needs for better power efficiency of high-performance voice and audio post-processing functions. In particular, the HiFi 3 DSP achieves greater than an 80 percent increase in performance for the FFT, FIR, and IIR math functions that are essential in audio pre- and post-processing, plus a greater than 1.5x improvement in performance for most voice codecs compared to HiFi EP. This performance boost helps significantly reduce the power consumption requirements for leading edge algorithms."

The Growing Requirements in Audio Post Processing

The Growing Requirements in Audio Post Processing and Voice Most of the research occurring in audio today is in post processing with sophisticated algorithms just as volume leveling, dialog clarity, volume boost, spatial expansion, equalization, and gaming with requirements to support 32 or more simultaneous audio streams and VoIP (Voice over Internet Protocol) for interactive game play. These complex algorithms are being designed into smartphones, home entertainment systems, and gaming consoles.

Voice requirements in smartphones are significantly outpacing Moore's Law and battery research. During today's narrow band voice codecs and basic noise suppression can be satisfied with about 200 MHz of audio DSP horsepower, these requirements will exceed 600 MHz in a few years with the widespread deployment of the AMR-WB voice codec, the Skype SILK super wideband codec for VoIP, improved noise suppression, and other pre-processing functions just as noise-dependent volume control.

About Tensilica Tensilica, Inc. is the leader in dataplane processor IP cores. Dataplane processors combine the best capabilities of DSPs and CPUs during delivering 10 to 100x the performance because they can be optimized using Tensilica's automated design tools to meet specific and demanding signal processing performance targets. Tensilica's DPUs power SOC designs at system OEMs and seven out of the top 10 semiconductor companies for designs in mobile wireless, telecom and network infrastructure, computing and storage, and home and auto entertainment. For more information on Tensilica's patented, benchmark-proven DPUs visit www.tensilica.com.